Amplifier¶
JP150PCB 1.3PCB 1.4generatedJan PřibyslavskýThis page does not apply to the product or PCB revision chosen in the header.
The two TAS3251 power stages, AMP0 and AMP1, and the master volume AMP:VOL that applies
to both. Volumes are 0 to 99. The mute and reset commands drive the control pins of a power
stage directly; the fault commands decode what its FAULT and CLIP_OTW pins report.
Commands¶
| Command | Function | Parameter | Answer | Since | Boards |
|---|---|---|---|---|---|
AMP:VOL? |
Master volume | – | AMP:VOL:<0..99> |
26.6.2 | 1.3, 1.4 |
AMP:VOL |
Set the master volume | 0..99 |
no answer | 26.6.2 | 1.3, 1.4 |
AMP0:VOL? |
Volume of power stage 0 | – | AMP0:VOL:<0..99> |
26.6.2 | 1.3, 1.4 |
AMP0:VOL |
Set the volume of power stage 0 | 0..99 |
no answer | 26.6.2 | 1.3, 1.4 |
AMP1:VOL? |
Volume of power stage 1 | – | AMP1:VOL:<0..99> |
26.6.2 | 1.3, 1.4 |
AMP1:VOL |
Set the volume of power stage 1 | 0..99 |
no answer | 26.6.2 | 1.3, 1.4 |
AMP0:HWMUTE? |
Hardware mute of power stage 0 | – | AMP0:HWMUTE:<0|1> |
26.6.2 | 1.3, 1.4 |
AMP0:HWMUTE |
Mute power stage 0 at its MUTE pin | 0, 1 |
no answer | 26.6.2 | 1.3, 1.4 |
AMP1:HWMUTE? |
Hardware mute of power stage 1 | – | AMP1:HWMUTE:<0|1> |
26.6.2 | 1.3, 1.4 |
AMP1:HWMUTE |
Mute power stage 1 at its MUTE pin | 0, 1 |
no answer | 26.6.2 | 1.3, 1.4 |
AMP0:RESET? |
Reset line of power stage 0 | – | AMP0:RESET:<0|1> |
26.7.0 | 1.3, 1.4 |
AMP0:RESET |
Hold power stage 0 in reset | 0, 1 |
no answer | 26.7.0 | 1.3, 1.4 |
AMP1:RESET? |
Reset line of power stage 1 | – | AMP1:RESET:<0|1> |
26.7.0 | 1.3, 1.4 |
AMP1:RESET |
Hold power stage 1 in reset | 0, 1 |
no answer | 26.7.0 | 1.3, 1.4 |
AMP0:CLIP? |
Clipping of power stage 0 within the last 500 ms | – | AMP0:CLIP:<0|1> |
26.6.2 | 1.3, 1.4 |
AMP1:CLIP? |
Clipping of power stage 1 within the last 500 ms | – | AMP1:CLIP:<0|1> |
26.6.2 | 1.3, 1.4 |
AMP0:ERROR? |
FAULT pin of power stage 0 | – | AMP0:ERROR:<0|1> |
26.6.2 | 1.3, 1.4 |
AMP1:ERROR? |
FAULT pin of power stage 1 | – | AMP1:ERROR:<0|1> |
26.6.2 | 1.3, 1.4 |
AMP0:FAULT? |
Decoded live fault state of power stage 0 | – | AMP0:FAULT:<state> |
26.7.0 | 1.3, 1.4 |
AMP1:FAULT? |
Decoded live fault state of power stage 1 | – | AMP1:FAULT:<state> |
26.7.0 | 1.3, 1.4 |
AMP0:FAULT:LATCHED? |
Worst fault of power stage 0 since the last clear | – | AMP0:FAULT:LATCHED:<NONE|OLP_UVP|OTE> |
26.7.0 | 1.3, 1.4 |
AMP1:FAULT:LATCHED? |
Worst fault of power stage 1 since the last clear | – | AMP1:FAULT:LATCHED:<NONE|OLP_UVP|OTE> |
26.7.0 | 1.3, 1.4 |
AMP0:FAULT:CLEAR |
Clear the latched fault of power stage 0 | – | no answer | 26.7.0 | 1.3, 1.4 |
AMP1:FAULT:CLEAR |
Clear the latched fault of power stage 1 | – | no answer | 26.7.0 | 1.3, 1.4 |
AMP0:FAULT:RECOVER |
Reset pulse to recover power stage 0 from a latched fault | – | no answer | 26.7.0 | 1.3, 1.4 |
AMP1:FAULT:RECOVER |
Reset pulse to recover power stage 1 from a latched fault | – | no answer | 26.7.0 | 1.3, 1.4 |
AMP0:CLOCK? |
Clock and PLL diagnostics of power stage 0 | – | AMP0:CLOCK:PLL:<0|1>,CDST:0x<hh>,CLKERR:0x<hh>,FS:0x<h>,RATIO:0x<h> |
26.7.0 | 1.3, 1.4 |
AMP1:CLOCK? |
Clock and PLL diagnostics of power stage 1 | – | AMP1:CLOCK:PLL:<0|1>,CDST:0x<hh>,CLKERR:0x<hh>,FS:0x<h>,RATIO:0x<h> |
26.7.0 | 1.3, 1.4 |
Since is the release the command appeared in; 26.6.2 is the oldest release documented here, so a command marked 26.6.2 may be older.
AMP:VOL¶
Commands: AMP:VOL?, AMP:VOL
The master volume applies to both channels. A value above 99 is an SCPI error and changes nothing. The volume is a stored setting (autosave after 3 s without a change).
AMP0:VOL, AMP1:VOL¶
Commands: AMP0:VOL?, AMP0:VOL, AMP1:VOL?, AMP1:VOL
The channel volumes, 0 to 99 each, on top of the master volume. Stored settings, like the
master volume. AMP0 and AMP1 follow the same rules throughout this page.
AMP0:HWMUTE, AMP1:HWMUTE¶
Commands: AMP0:HWMUTE?, AMP0:HWMUTE, AMP1:HWMUTE?, AMP1:HWMUTE
Drives the MUTE pin of the power stage (1 = muted). The query reads back the last commanded
level, not a register. A value above 1 is an SCPI error.
AMP0:RESET, AMP1:RESET¶
Commands: AMP0:RESET?, AMP0:RESET, AMP1:RESET?, AMP1:RESET
Drives the RESET pin of the power stage (1 = held in reset); the query reads back the last
commanded level. While the reset is asserted, and for about 250 ms after it is released,
AMPx:ERROR? reads 0 and AMPx:FAULT? reports MASKED, because the FAULT pin is not
meaningful then. Releasing the reset also clears the latched fault. A value above 1 is an SCPI
error.
AMP0:CLIP?, AMP1:CLIP?¶
Commands: AMP0:CLIP?, AMP1:CLIP?
1 when a clip pulse of the power stage was sampled within the last 500 ms. The firmware
samples the CLIP_OTW pin at 10 kHz and holds the indication for 500 ms, so a host polling once
a second still sees short clips.
AMP0:ERROR?, AMP1:ERROR?¶
Commands: AMP0:ERROR?, AMP1:ERROR?
The raw level of the FAULT pin, 1 = fault asserted. 0 while the power stage is in reset
and during the 250 ms settling window after it. For the decoded cause use AMPx:FAULT?.
AMP0:FAULT?, AMP1:FAULT?¶
Commands: AMP0:FAULT?, AMP1:FAULT?
The fault state decoded from the FAULT and CLIP_OTW pins of the TAS3251. A steady over-temperature warning is told apart from clip pulses by a 30 ms continuous-low detector on CLIP_OTW.
Power-stage fault states
| Value | Meaning |
|---|---|
NONE |
No fault |
OTW |
Over-temperature warning only, no shutdown |
OLP_UVP |
FAULT asserted below the warning temperature, overload or undervoltage |
OTE |
FAULT asserted with a steady over-temperature warning, thermal shutdown |
MASKED |
The power stage is in reset or in the 250 ms settling window after it; the FAULT pin is not meaningful then |
AMP0:FAULT:LATCHED?, AMP1:FAULT:LATCHED?¶
Commands: AMP0:FAULT:LATCHED?, AMP1:FAULT:LATCHED?
The most severe fault seen since the last clear, kept by the 10 kHz sampler, so a fault that
came and went between two polls is still reported. Only asserted faults are latched: the answer
is NONE, OLP_UVP or OTE, never OTW or MASKED. Cleared by AMPx:FAULT:CLEAR and when
a reset of the power stage is released.
AMP0:FAULT:CLEAR, AMP1:FAULT:CLEAR¶
Commands: AMP0:FAULT:CLEAR, AMP1:FAULT:CLEAR
Clears the state read by AMPx:FAULT:LATCHED?. The hardware is not touched: a fault that is
still present latches again at the next sample.
AMP0:FAULT:RECOVER, AMP1:FAULT:RECOVER¶
Commands: AMP0:FAULT:RECOVER, AMP1:FAULT:RECOVER
The recovery the TAS3251 data sheet prescribes for a latched fault: the reset is asserted for 5 ms and released. The channel drops out for the pulse and the settling window after it. The control interface waits for the pulse.
AMP0:CLOCK?, AMP1:CLOCK?¶
Commands: AMP0:CLOCK?, AMP1:CLOCK?
A snapshot of the TAS3251 clock registers, read over I2C on request. PLL 1 = locked;
CDST the clock-detector status bits; CLKERR the clock-error flags; FS the detected
sample-rate code; RATIO the detected MCLK/LRCLK ratio code (TAS3251 data sheet, registers
0x5B, 0x5E and 0x5F). Reading the error register clears its latched flags, so this query
consumes them. A read failure is an SCPI error.
Changes¶
- 26.7.0: added
AMP0:RESET?,AMP0:RESET,AMP1:RESET?,AMP1:RESET,AMP0:FAULT?,AMP1:FAULT?,AMP0:FAULT:LATCHED?,AMP1:FAULT:LATCHED?,AMP0:FAULT:CLEAR,AMP1:FAULT:CLEAR,AMP0:FAULT:RECOVER,AMP1:FAULT:RECOVER,AMP0:CLOCK?,AMP1:CLOCK?; removedAMP0:RST,AMP1:RST. - 26.6.2 (oldest release documented): 16 commands.